Typical HAL SDRAM use cases for migration

This section provides information about typical HAL SDRAM use cases for migration.

Note

• In HAL2, HAL SDRAM provides the configuration and send command APIs to make the memory ready for read/write access. Read/Write APIs are removed as the SDRAM is memory mapped.

• The handle represents a bank and includes the global configuration for that bank.

• In HAL1, the instance represents the bank, while the sub-instance represents a sub-bank within it.

• CommandTarget in HAL1 is Device in HAL2.

Use case: Write and read operations

Sequence diagram

HAL1 sequence diagram HAL2 sequence diagram

Write and read operations

Code snippet

HAL1

HAL2

/* - */ /* Write data operation */ HAL_SDRAM_Write_8b(&hsdram, (uint32_t *)(device_address), data_to_write, BufferSize ); /* Read data operation */ HAL_SDRAM_Read_8b(&hsdram, (uint32_t *)(device_address), data_read, BufferSize );

uint32_t size; uint8_t *psdramaddress = (uint8_t *)device_address; uint8_t *psrcbuff = data_to_write; uint8_t *pdestbuff = data_read; /* Write data to memory */ for (size = BufferSize; size != 0U; size--) { *psdramaddress = *psrcbuff; psrcbuff++; psdramaddress++; } /* Read data from memory */ for (size = BufferSize; size != 0U; size--) { *pdestbuff = *psdramaddress; pdestbuff++; psdramaddress++; }

Key changes

1. HAL2 removes SDRAM read/write APIs because SDRAM is memory mapped.

2. Data accesses are performed directly through memory read/write operations.

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Use case: Write and read DMA operations

Sequence diagram

HAL1 sequence diagram HAL2 sequence diagram

Write and read DMA operations

Code snippet

HAL1	HAL2
/* Write DMA data operation -------------------- */ HAL_SDRAM_Write_DMA(&hsdram, (uint32_t *)(device_address), data_to_write, BufferSize ); /* Wait for complete callback */ /* Read DMA data operation */ HAL_SDRAM_Read_DMA(&hsdram, (uint32_t *)(device_address), data_read, BufferSize ); /* Wait for complete callback */	/* Write DMA data operation */ HAL_DMA_StartDirectXfer_IT(&dma_handle, data_to_write, (uint32_t *)(device_address), BufferSize ); /* Wait for complete callback */ /* Read DMA data operation */ HAL_DMA_StartDirectXfer_IT(&dma_handle, (uint32_t *)(device_address), data_read, BufferSize ); /* Wait for complete callback */

Key changes

1. HAL2 uses generic HAL DMA direct transfer APIs for SDRAM DMA operations.

2. HAL2 return status can be HAL_INVALID_PARAM for invalid configuration/parameters.

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Use case: Command process operation

Sequence diagram

HAL1 sequence diagram HAL2 sequence diagram

Send command operation

Code snippet

HAL1	HAL2
All bank precharge command FMC_SDRAM_CommandTypeDef Command; Command.CommandMode = FMC_SDRAM_CMD_PALL; Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1; Command.AutoRefreshNumber = 1; Command.ModeRegisterDefinition = 0; HAL_SDRAM_SendCommand(&hsdram, /* --- */ &Command, 1000 );	All bank precharge command hal_sdram_command_t Command; Command.command = HAL_SDRAM_COMMAND_PALL; /* ----------------------------------- */ /* ----------------------------------- */ /* ----------------------------------- */ HAL_SDRAM_SendCommand(&hsdram, HAL_SDRAM_DEVICE1, &Command, 1000 );
Clock Enable command FMC_SDRAM_CommandTypeDef Command; Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE; Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1; Command.AutoRefreshNumber = 1; Command.ModeRegisterDefinition = 0; HAL_SDRAM_SendCommand(&hsdram, &Command, 1000 );	Clock Enable command hal_sdram_command_t Command; Command.command = HAL_SDRAM_COMMAND_CLK_ENABLE; /* ----------------------------------- */ /* ----------------------------------- */ /* ----------------------------------- */ HAL_SDRAM_SendCommand(&hsdram, HAL_SDRAM_DEVICE1, &Command, 1000 );
Auto refresh mode command FMC_SDRAM_CommandTypeDef Command; Command.CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE; Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1; Command.AutoRefreshNumber = 8; Command.ModeRegisterDefinition = 0; HAL_SDRAM_SendCommand(&hsdram, &Command, SDRAM_TIMEOUT );	Auto refresh mode command hal_sdram_command_t Command; Command.command = HAL_SDRAM_COMMAND_CLK_ENABLE; /* ----------------------------------- */ Command.parameter = 800; /* ----------------------------------- */ HAL_SDRAM_SendCommand(&hsdram, HAL_SDRAM_DEVICE1, &Command, 1000 );
Load mode command #define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000) #define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000) #define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030) #define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000) #define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200) FMC_SDRAM_CommandTypeDef Command; tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 | SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL | SDRAM_MODEREG_CAS_LATENCY_3 | SDRAM_MODEREG_OPERATING_MODE_STANDARD | SDRAM_MODEREG_WRITEBURST_MODE_SINGLE; Command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE; Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2; Command.AutoRefreshNumber = 1; Command.ModeRegisterDefinition = tmpmrd; HAL_SDRAM_SendCommand(&hsdram, &Command, 1000 );	Load mode command #define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000) #define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000) #define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030) #define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000) #define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200) hal_sdram_command_t Command; tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 | SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL | SDRAM_MODEREG_CAS_LATENCY_3 | SDRAM_MODEREG_OPERATING_MODE_STANDARD | SDRAM_MODEREG_WRITEBURST_MODE_SINGLE; Command.command = HAL_SDRAM_COMMAND_LOAD; /* ----------------------------------- */ /* ----------------------------------- */ Command.parameter = tmpmrd; HAL_SDRAM_SendCommand(&hsdram, HAL_SDRAM_DEVICE1, &Command, 1000 );

Key changes

1. HAL2 requires the target device (HAL_SDRAM_DEVICEx) when sending a command.